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Streamlining SI/PI Analysis with Cadence Clarity 3D Solver’s New ACE Technology

Cadence has introduced Automated Channel Extraction (ACE) technology within its Clarity 3D Solver to automate electromagnetic (EM) simulation workflows for complex electronic designs, including 3D-ICs, IC packages, and high-speed PCB systems.

Key technical aspects include:

  • Automated Workflow: ACE automates tasks such as layout partitioning, channel extraction, cutout generation, and result re-aggregation, reducing the manual effort traditionally associated with signal and power integrity (SI/PI) analysis workflows.
  • Compute Resource Utilization: The technology supports simultaneous cutouts and enables engineers to serialize or parallelize simulations based on available compute resources and workflow requirements.
  • Ecosystem Integration: ACE is integrated with the Virtuoso Layout Suite and Allegro X Design Platform to support broader PCB, package, and 3D-IC design workflows.

The technology aims to reduce manual setup complexity, support repeatable 3D EM simulation workflows across design iterations, and streamline pre- and post-processing activities.
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Image courtesy: Cadence
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